Memory Consistency for Parallel Systems: A Reformulation Without Global Time
نویسندگان
چکیده
Cross-chip latencies now make multicore architectures resemble distributed systems. The design of distributed protocols is notoriously error-prone, particularly when their analysis is based on the use of global time. Classical memory consistency models for parallel programming, such as linearisability, uses such a global ordering. This talka examines the reformulation, without global time, of these consistency models.
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